Summary
Overview
Work history
Education
Skills
Languages
Timeline
Generic

Victor Alikberov

Limerick,Ireland

Summary

MEng in Electronic Engineering graduate, currently working as an Analog Layout Engineer. Has an experience in designing analog layouts using Cadence Virtuoso and Siemens Calibre tools. Technology experience includes 65nm, 250nm BCD (Bipolar-CMOS-DMOS) process nodes. Strongly interested in IC design, manufacturing and semiconductor physics.

Overview

3
3
years of professional experience
5
5
years of post-secondary education

Work history

Analog Layout Engineer

ON Semiconductor
Limerick, Ireland
09.2022 - Current
  • Worked on both chip and block level layouts of fully custom mixed signal ICs. The projects worked on include power controllers, driver ICs and monolithic driver + MOSFET (DrMOS) parts.
  • Gathered experience in 65nm and 250nm BCD (Bipolar-CMOS-DMOS) technologies.
  • Collaborated closely with analog designers to resolve any issues and deliver high quality silicon.
  • Performed physical verification using Siemens Calibre tools to ensure that layouts are LVS/DRC clean.
  • Designed bonding diagrams for packaging team.

Education

Master of Engineering - Electronic Engineering

SETU South East Technological University
Waterford, Ireland
09.2021 - 09.2022

Bachelor of Engineering - Electronic Engineering

St. Petersburg Electrotechnical University
Saint-Petersburg, Russia
09.2017 - 06.2021

Skills

  • Cadence Virtuoso XL
  • Siemens Calibre physical verification tools
  • DRC/LVS interpretation
  • Layout matching techniques, parasitics and noise reduction

Languages

English
Advanced
Russian
Native

Timeline

Analog Layout Engineer

ON Semiconductor
09.2022 - Current

Master of Engineering - Electronic Engineering

SETU South East Technological University
09.2021 - 09.2022

Bachelor of Engineering - Electronic Engineering

St. Petersburg Electrotechnical University
09.2017 - 06.2021

Similar Profiles

Create profile
Victor Alikberov