Thoran Kumar Reddy Gaddam
Summary
Professional engineer with experience in design verification, specializing in digital and analog circuit validation. Skilled in using advanced verification methodologies, debugging, and simulation tools. Strong focus on team collaboration and delivering reliable results, adaptable to changing project needs. Known for keen problem-solving abilities and effective communication with cross-functional teams.
Overview
5
5
years of professional experience
1
1
Certification
Work History
Design Verification Engineer
Atria Logic
02.2022 - Current
- Client - Samsung
- Developed comprehensive test plans based on requirements analysis, ensuring thorough coverage of all critical aspects of design functionality.
- Verified design functionalities of more than 10 sram memories with multiple memory instances in RTL, NTL & PnR-SDF Flow.
- Delivered VCDs to DFT Team.
- Generated IRDROP VCDs to support EMIR Team.
- Ran regressions having test count more than twelve thousand test cases and fixed RTL bugs based on failures.
- Implemented UVM based test bench for IPs named eFlash DNA and MRAM DNA.
- Provided coverage and unr database to RTL team after implementing sequences based on verification plan.
Technical Officer
ECIL
03.2021 - 09.2021
- Performed functionality testing of EVM.
- Learnt working with AOI Machine for Automated PCB Testing.
- Worked on developing the embedded system for TLD R&D Project, based on customer requirements.
Associate Engineer
MicroGo
09.2019 - 12.2019
- Developed embedded systems for devices named Go assure and Go assure Lite.
- Increased production capacity by designing and implementing automated processes in manufacturing facilities.
Education
B.Tech - Electronics And Communications Engineering
Hindustan Institute of Technology And Science
Chennai05-2019
Skills
- IP verification
- UVM methodology
- SystemVerilog expertise
- Constraint random testing
- Verification planning
- Functional coverage
Accomplishments
Gained patent rights through college for project implemented during final year of graduation.
Certification
Completed certified course from Maven Silicon in the domain of VLSI DESIGN and VERIFICATION.
Languages
Telugu
Native language
English
Intermediate
B1
Tamil
Intermediate
B1
Hindi
Elementary
A2
Timeline
Design Verification Engineer
Atria Logic
02.2022 - Current
Technical Officer
ECIL
03.2021 - 09.2021
Associate Engineer
MicroGo
09.2019 - 12.2019
B.Tech - Electronics And Communications Engineering
Hindustan Institute of Technology And Science
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